JPS6454152U - - Google Patents
Info
- Publication number
- JPS6454152U JPS6454152U JP14917387U JP14917387U JPS6454152U JP S6454152 U JPS6454152 U JP S6454152U JP 14917387 U JP14917387 U JP 14917387U JP 14917387 U JP14917387 U JP 14917387U JP S6454152 U JPS6454152 U JP S6454152U
- Authority
- JP
- Japan
- Prior art keywords
- memory device
- microcomputer
- support system
- development support
- ram section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14917387U JPS6454152U (en]) | 1987-09-29 | 1987-09-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14917387U JPS6454152U (en]) | 1987-09-29 | 1987-09-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6454152U true JPS6454152U (en]) | 1989-04-04 |
Family
ID=31421161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14917387U Pending JPS6454152U (en]) | 1987-09-29 | 1987-09-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6454152U (en]) |
-
1987
- 1987-09-29 JP JP14917387U patent/JPS6454152U/ja active Pending